Well-known build-up processes for producing a multi-layered printed circuit board include an additive process and a semi-additive process in which a conductor pattern is formed on an insulating plate. The above board producing methods use, as the number of layers increases, in order to decrease the processing steps and prevent a noticeable decrease in the yield ratio, a laminating technique of bonding separately produced board layers together with a conducting material or the like in one process.
More particularly, a conducting material that is a melted metal is supplied into through-holes formed on a bonding layer and then heat and pressure are applied to a plurality of boards and thus the layers are stacked up. During the process, the bonding sheet is softened due to an increased temperature and the viscosity decreases. By the layer-stacking pressure, the material of the bonding sheet may be moved and the moved material may push the conducting material away.
A well-known technique that solves the above problem involves adjusting, depending on residual copper ratios of wiring patterns and lands formed on the surface of the board, the volume of a bonding resin to a requisite minimum, thereby suppressing an amount of the material of the bonding sheet moved by the layer-stacking pressure and, eventually, preventing the moved material from pushing the conducting material away. More particularly, various bonding sheets having different thicknesses are designed depending on the boards having different residual copper ratios and thus the thickness of the bonding resin is adjusted.    Patent Document 1: Japanese Laid-open Patent Publication No. 2002-290032
However, since the above technique of adjusting the amount of the bonding resin depending on the wiring patterns and the lands formed on the surface of the board needs various bonding sheets depending on the boards having different residual copper ratios, the technique needs complicated board producing steps.